4.6 Article

An easy-to-use mismatch model for the MOS transistor

Journal

IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume 37, Issue 8, Pages 1056-1064

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSSC.2002.800953

Keywords

device mismatch; modeling; MOSFETs

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In this paper, a physics-based mismatch model is presented. It is demonstrated on a 0.18-mum technology that a simple mismatch model can still be used to characterize deep-submicron technologies. The accuracy of the model is examined and found to be within 20% in the strong inversion region. Bulk bias dependence is modeled in a physical way. To extract the mismatch parameters, a weighted fit is introduced. It is shown that the width and length dependence of the mismatch parameters is given by the Pelgrom model.

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