4.3 Article

Reliability studies and design improvement of mirror image CSP assembly

Journal

MICROELECTRONICS RELIABILITY
Volume 42, Issue 12, Pages 1931-1937

Publisher

PERGAMON-ELSEVIER SCIENCE LTD
DOI: 10.1016/S0026-2714(02)00124-5

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in this paper, both simulation and testing techniques were used to address the reliability issue of mirror chip scale package (CSP) assembly. First, finite element modeling was employed to study the stress and strain of a mirror image CSP with comparison to a single-sided CSP. The study clearly illustrates that the strain distribution is not equally distributed across both sides of the CSP. The highest strain on one side of the mirror image CSP is often larger than the other one, which reduced the reliability of the package as a whole. In order to study the effects on the reliability of the mirror image CSP assembly, several parameters, such as PCB board materials selection, board thickness and warpage, PCB via design and routing, were investigated. Moreover, a design of experiment matrix was constructed to identify significant factors to minimize the highest strain in solder joints of mirror image. The test vehicle was then designed and assembled. Thermal cycling (0 to 100 degreesC) and thermal shock tests were thereafter performed to the mirror image CSPs and single-sided CSPs to compare with the simulation results. (C) 2002 Elsevier Science Ltd. All rights reserved.

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