Study of trapping phenomenon in 4H-SiC MESFETs: Dependence on substrate purity

This work demonstrates that the purity, meaning the low density of electron traps in semi-insulating (S.I) SiC substrate, can be crucial for the electrical characteristics of 4H-SiC MESFETs. Structures realized. on two types of S.I substrates have been investigated. The first kind is vanadium doped substrates grown by the classical Physical Vapor Transport (PVT) sublimation technique. the second kind are extremely low vanadium content semi-insulating substrates grown by the high temperature (HTCVD) technique. For all the transistors, I-d-V-ds. measurements have been performed as a function of temperature. Different parasitic effects have been observe on the static output characteristics, in the case of PVT substrates. Frequency dispersion measurements of the transconductance and drain-source output conductance, have next been realized. The results give clear evidence, of the. presence of deep traps in the transistors realized on PVT substrates. Those traps have an activation energy of 1.05 eV and a capture cross section between 10(-18) cm(-2) and 10(-19) cm(-2).,They are most probably related to vanadium. The correlation between the presence of these traps and the parasitic effects. on the output characteristics is discussed and the trap localization in the structure is established. In the case of HTCVD very low vanadium substrates, no parasitic effect have been observed. and no presence of traps was detected by the different characterization techniques.