4.6 Article

Analysis of on-chip spiral inductors using the distributed capacitance model

Journal

IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume 38, Issue 6, Pages 1040-1044

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSSC.2003.811965

Keywords

distributed capacitance model (DCM); miniature three-dimensional inductor; on-chip inductor; stacked inductor

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In this paper, a distributed capacitance model (I)CM) for monolithic spiral inductors is developed to predict the equivalent capaciting coupling capacitances C-p between the two terminals and the equivalent capacitance between the metal track and the substrate C-sub. Therefore, the characteristics of inductors such as the S parameter, the quality factor Q, and the self-resonant frequency f(SR) can be predicted by its series inductance, equivalent capacitances, and series resistance. A large number of inductors have been implemented in 0.25- and 0.35-mum CMOS processes to demonstrate the prediction accuracy. For planar and multilayer inductors, DCM can provide a quick and accurate assessment to the design of monolithic spiral inductors.

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