Electroless deposition of NiB on 15 inch glass substrates for the fabrication of transistor gates for liquid crystal displays

The thin-film transistor (TFT) array of liquid-crystal displays (LCDs) comprises a number of metallic, semiconducting, and insulating layers, which need to be deposited and patterned accurately with very high yields on a (large) glass substrate. We are exploring how to fabricate the gate metal lines of the TFT array in an entirely new and potentially cost-effective way-by depositing the metal layer of the TFT array using electroless deposition (ELD) and by patterning the gates using microcontact printing (muCP). To achieve this goal, we separately explore first the plating conditions to deposit a gate metal on 15 in. glass substrates, and second the printing process to finally combine them later in the work. Here, we review in depth the metallization of the glass by ELD of NiB as gate material, and we demonstrate the patterning of the gate layer using a conventional photoengraving process (PEP, i.e., photolithography and wet etching). We selected NiB because this material can fulfill the conductivity requirements for making an SXGA (1280 pixels x 1020 pixels) display having a 157 pixel per inch resolution. Because ELD requires the presence of a catalyst on the substrate, we derivatized the glass by grafting 3-(2-aminoethylamino)propyltrimethoxysilane (EDA-Si) from an aqueous solution, which serves as linker between the glass and colloidal Pd/Sn particles. We identify the optimum conditions for the derivatization of the glass and to activate it with colloidal Pd/Sn in a uniform manner so as to electroless deposit high-quality NiB layers. We plated uniform NiB films of 120 nm thickness on both faces of 15 in. glass substrates, and we removed the NiB from one face of the substrate using HNO3 dissolved in water. The remaining NiB layer was patterned using a mask of photoresist and an etch bath comprising an aqueous solution of 3-nitrobenzenesulfonic acid (NBSA) and ethylenediamine (EDA) at pH similar to 9. This etch system minimizes the galvanic coupling between the Pd/Sn particles and the NiB, and it enabled patterning the gates with an accuracy better than 1 mum. Annealing the NiB layer at 400 degreesC reduces its specific resistivity from 25 to 13 muOmega cm, and the roughness and adhesion of the layer to the glass enable the plasma deposition of silicon nitride (SiNx) and amorphous silicon (a-Si) layers over the patterned array of gates. Building an array of TFTs for a SXGA display using the NiB as the gate layer yielded transistors with transfer and output characteristics similar to those fabricated using a conventional gate material. The work presented here may spur the introduction of novel surface chemistry processes into flat-panel-display factories.