A process integration of high-performance 64-kb MRAM

We have demonstrated fully integrated 64-kb magnetoresistive random access memory (MRAM) using 0.24-mum CMOS technology and discussed some key issues in process integration. Optimal tunneling magnetoresistive (TMR) properties of MRAM bits (37% of TMR ratio and 5-10 kOmega.mum(2) of RA) were obtained mainly by the control of bottom electrode roughness, and electrical shorting was avoided by some commercialized wet solutions. In viewpoint of process integration, excellent TMR properties of magnetic tunnel junction (MTJ) fresh films and prevention of their degradation in post patterning process are two crucial factors, and especially, electrical shorting requires some careful control.