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VLSI implementations of threshold logic - A comprehensive survey

Journal

IEEE TRANSACTIONS ON NEURAL NETWORKS
Volume 14, Issue 5, Pages 1217-1243

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TNN.2003.816365

Keywords

integrated circuits; neural-network (NN) hardware; threshold logic; very-large-scale integration (VLSI)

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This paper is an in-depth review on silicon implementations of threshold logic gates that covers several decades. In this paper, we will mention early MOS threshold logic solutions and detail numerous very-large-scale integration (VLSI) implementations including capacitive (switched capacitor and floating gate with their variations), conductance/current (pseudo-nMOS and output-wired-inverters, including a plethora of solutions evolved from them), as well as many differential solutions. At the end, we will briefly mention other implementations, e.g., based on negative resistance devices and on single electron technologies.

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