Low-temperature atomic-layer-deposition lift-off method for microelectronic and nanoelectronic applications

We report a method for depositing patterned dielectric layers with submicron features using atomic layer deposition. The patterned films are superior to sputtered or evaporated films in continuity, smoothness, conformality, and minimum feature size. Films were deposited at 100-150 degreesC using several different precursors and patterned using either electron-beam or photoresist. The low deposition temperature permits uniform film growth without significant outgassing or hardbaking of resist layers. A lift-off technique presented here gives sharp step edges with edge roughness as low as similar to10 nm. We also measure dielectric constants (kappa) and breakdown fields for the high-kappa materials aluminum oxide (kappasimilar to8-9), hafnium oxide (kappasimilar to16-19), and zirconium oxide (kappasimilar to20-29), grown under similar low temperature conditions. (C) 2003 American Institute of Physics.