Journal
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 50, Issue 10, Pages 2112-2119Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2003.817271
Keywords
capacitance measurements; dielectric materials; MOS capacitors; MOSFETs; parameter estimation; quantization; semiconductor device measurements; semiconductor-insulator interface
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A new technique has been proposed for the extraction of the capacitance of the ultrathin high-K gate dielectrics C-di. The only assumptions made in deriving the mathematical relations for the extraction plots are that, in the accumulation regime, both the space charge and the interface trap capacitances are exponential functions of betaphi(s), where phi(s), is the surface potential. The deviation of the value of the constant \beta\ from that of q/2kT may be considered an indication of the extent of quantization. The proposed technique, and for the sake of comparison, some existing gate dielectric capacitance extraction techniques, were applied to different high-K gate dielectrics. The experimental capacitance-voltage (C-V) data were taken from the literature, after carefully selecting the high-K gate dielectrics, to obtain varying band offsets and equivalent oxide thickness (EOT). Satisfactory linear fits, to the data points in the extraction plots, were obtained consistently in the case of the proposed technique, and the values of the gate dielectric capacitance Cdi, appear to be reasonable, and consistent with the experimental values of beta. While the classical value of \beta\ is 19.38 V-1 at 300 K, the experimental value of \beta\ varied from 15.31 V-1 in the case of an La2O3 gate dielectric with EOT = 0.47 nm to 5.77 V-1 in the case of an Al2O3-HfO2 laminate gate dielectric with EOT = 1.95 nm. The McNutt, Maserjian, and Ricco techniques were found to have significant problems. The extraction plots were nonlinear in the case of both the McNutt and the Maserjian techniques; different linear fits could be made to different parts of the accumulation region, leading to multiple and/or improbable values for the gate dielectric capacitance. The Ricco factor had multiple zeros, leading to the same consequence. In addition to C-di, and an experimental quantization index beta, the proposed technique also yields an experimental phi(s) versus bias for the accumulation regime.
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