Journal
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 51, Issue 6, Pages 971-977Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2004.829513
Keywords
Al2O3; Fermi pinning; gate dielectric; HFO2; polysilicon
Ask authors/readers for more resources
We report here that Fermi pinning at the polysilicon/metal oxide interface causes high threshold voltages in MOSFET devices. Results indicate that pinning occurs due to the interfacial Si-Hf and Si-O-Al bonds for Hfo(2) and Al2O3, respectively. Oxygen vacancies at polysilicon/HfO2 interfaces also lead to Fermi pinning. We show that this fundamental characteristic affects the observed polysilicon depletion. In Part I, the theoretical background is reviewed and the impact of the different gate stack regions are separated out by investigating the relative threshold voltage shifts of devices with Hf-based dielectrics. The effects of the interfacial bonding are examined in Part II.
Authors
I am an author on this paper
Click your name to claim this paper and add it to your profile.
Reviews
Recommended
No Data Available