Journal
IEEE ELECTRON DEVICE LETTERS
Volume 25, Issue 6, Pages 420-423Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2004.829032
Keywords
dual-gate CMOS; Fermi-level pinning; gate electrodes; HfO2; high-kappa charges; metal gates; workfunction extraction
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This letter presents a methodology to accurately extract the work function of metal electrodes on high-kappa dielectrics with various charge distributions. A mathematical analysis including sources of errors were used to study the effect of charge distribution in gate dielectric stacks on the flatband voltage of the device. The calculations are verified by experimental results obtained for Ru-Ta alloys on HfO2 and SiO2 gate dielectric stacks. It is shown that accounting for the appropriate charge model is imperative for accurate calculation of workfunction on high-kappa/SiO2 gate dielectric stacks.
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