Journal
JOURNAL OF NON-CRYSTALLINE SOLIDS
Volume 338, Issue -, Pages 720-724Publisher
ELSEVIER SCIENCE BV
DOI: 10.1016/j.jnoncrysol.2004.03.076
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Thin film transistors (TFTs) of nanocrystalline silicon (nc-Si:H) can be made at temperatures as low as 150 degreesC and are capable of p and n channel operation. High carrier mobility and low off current can be achieved in the staggered top-gate, bottom-source/drain geometry. Beginning the growth of nc-Si:H with a seed layer placed underneath the TFT promotes the structural evolution of the nc-Si:H channel layer and raises the carrier field effect mobilities and current ON/OFF ratio. We study the correlation between the evolution of the nc-Si:H structure and TFT electrical characteristics and determine the onset thickness of the continuously crystalline channel. The nc-Si:H surface topography is characterized by atomic force microscopy (AFM) and scanning electron microscopy (SEM), while electrical properties are examined by TFT performance. 50-nm thick channel layers have the smallest surface roughness and yield transistors with the highest hole and electron field effect mobilities of similar to0.25 and similar to40 cm(2) V-1 s(-1), respectively. (C) 2004 Elsevier B.V. All rights reserved.
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