Bandwidth enhancement for transimpedance amplifiers

A technique for bandwidth enhancement of a given amplifier is presented. Adding several interstage passive matching networks enables the control of transfer function-and frequency response behavior. Parasitic capacitances of cascaded gain stages are isolated from each other and absorbed into passive networks. A simplified design procedure, using well-known low-pass filter component values, is introduced. To demonstrate the feasibility of the method, a CMOS transimpedance amplifier (TIA) is implemented in a 0.18-mum BiCMOS technology. It achieves 3 dB bandwidth of 9.2 GHz in the presence of a 0.5-pF photodiode capacitance. This corresponds to a bandwidth enhancement ratio of 2.4 over the amplifier without the additional passive networks. The trans-resistance gain is 54 dBOmega, while drawing 55 mA from a 2.5-V supply. The input sensitivity of the TIA is -18 dBm for a bit error rate of 10(-12).