Journal
APPLIED SURFACE SCIENCE
Volume 254, Issue 24, Pages 8005-8015Publisher
ELSEVIER
DOI: 10.1016/j.apsusc.2008.03.051
Keywords
compound semiconductors; surface passivation; band alignment; Fermi level pinning; interface states
Ask authors/readers for more resources
Interface models and processing technologies are reviewed for successful establishment of surface passivation, interface control and MIS gate stack formation in III-V nanoelectronics. First, basic considerations on successful surface passivation and interface control are given, including review of interface models for the band alignment at interfaces, and effects of interface states in nanoscale devices. Then, a brief review is given on currently available surface passivation technologies for III-V materials, including the Si interface control layer (ICL)- based passivation scheme by the authors' group. The Si-ICL technique has been successfully applied to surface passivation of nanowires and to formation of a HfO2 high-k dielectric/GaAs interfaces with low values of the interface state density. (C) 2008 Published by Elsevier B. V.
Authors
I am an author on this paper
Click your name to claim this paper and add it to your profile.
Reviews
Recommended
No Data Available