Journal
IEEE TRANSACTIONS ON NEURAL NETWORKS
Volume 15, Issue 5, Pages 1296-1304Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TNN.2004.832842
Keywords
binary synapse; Hebbian learning; neural network hardware; neuromorphic analog very large scale integration; (VLSI); spiking neuron; spike synchrony; spike timing; spike-timing-dependent synaptic plasticity (STDP)
Ask authors/readers for more resources
Spike-timing dependent synaptic. plasticity (STDP) is a form of plasticity driven by precise spike-timing differences between presynaptic and postsynaptic spikes. Thus, the learning rules underlying STDP are suitable for learning neuronal temporal phenomena such as spike-timing synchrony. It is well known that weight-independent STDP creates unstable learning processes resulting in balanced bimodal weight distributions. In this paper, we present a, neuromorphic analog very large scale integration (VLSI) circuit that contains a feedforward network of silicon neurons with STDP synapses. The learning rule implemented can be tuned to have a moderate level of weight dependence. This helps stabilise the learning process and still generates binary weight distributions. From on-chip learning experiments we show that the chip can detect and amplify hierarchical spike-timing synchrony structures embedded in noisy spike trains. The weight distributions of the network emerging from learning are bimodal.
Authors
I am an author on this paper
Click your name to claim this paper and add it to your profile.
Reviews
Recommended
No Data Available