Interface trap generation and recovery mechanisms during and after positive bias stress in metal-oxide-semiconductor structures

Interface trap (N-it) generation and their partial recovery during and after cessation of the positive bias-temperature stress (PBTS) in n-type metal-oxide-semiconductor capacitors have been investigated. The analysis of experimental results indicates that N-it creation is caused by the depassivation of Si-3 Si-H bonds at the Si/SiO2 interface by the atomic neutral hydrogen (H-0) cracked via electron impact at or near gate/oxide interface during electron injection from the substrate. N-it recovery after interruption of the stress is due to back diffusion of H-2 species toward the Si/SiO2 interface and repassivation of Si-3 Si-center dot dangling bonds. We propose that in absence of holes, a modified one dimensional reaction-diffusion (R-D) model following three step degradation sequences can qualitatively explain the generation and the recovery of Nit during and after PBTS. (C) 2012 American Institute of Physics. [http://dx.doi.org/10.1063/1.4711216]