Journal
APPLIED PHYSICS LETTERS
Volume 97, Issue 1, Pages -Publisher
AMER INST PHYSICS
DOI: 10.1063/1.3459972
Keywords
atomic layer deposition; contact resistance; field effect transistors; graphene; isolation technology
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Funding
- DARPA [FA8650-08-C-7838]
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We present a device fabrication process that produces graphene-based field-effect transistors with self-aligned gates. This process utilizes the inherent nucleation inhibition of atomic-layer-deposited films with the graphene surface to achieve electrical isolation of the gate electrode from the source/drain electrodes while maintaining electrical access to the graphene channel. Self-alignment produces access lengths of 15-20 nm, which allows for improved device stability, performance, and a minimal normalized contact resistance of 540 Omega mu m. (C) 2010 American Institute of Physics. [doi:10.1063/1.3459972]
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