Origins of threshold voltage shifts in room-temperature deposited and annealed a-In-Ga-Zn-O thin-film transistors

Threshold voltage (V(th)) stability was examined under constant current stress for a-In-Ga-Zn-O thin film transistors (TFTs) deposited at room temperature and annealed at 400 degrees C in dry or wet O(2) atmospheres. All the TFTs exhibited positive V(th) shifts (Delta V(th)) and the Delta V(th) value was reduced by the thermal annealing to < 2 V for 50 h. TFT simulations revealed that the Delta V(th) for the annealed TFTs is explained by increase in deep charged defects. Large Delta V(th) over 10 V and deterioration in subthreshold voltage swing were observed in the unannealed TFTs, which are attributed to the increase in shallow trap states. (C) 2009 American Institute of Physics. [DOI: 10.1063/1.3159831]