4.6 Article

Microporous SiO2 with huge electric-double-layer capacitance for low-voltage indium tin oxide thin-film transistors

Journal

APPLIED PHYSICS LETTERS
Volume 95, Issue 22, Pages -

Publisher

AMER INST PHYSICS
DOI: 10.1063/1.3271029

Keywords

capacitance; dielectric thin films; electrochemistry; indium compounds; plasma CVD; porous materials; semiconductor materials; silicon compounds; thin film transistors

Funding

  1. National Natural Science Foundation of China [10874042]
  2. National Excellent Doctoral Dissertation of PR China [200752]
  3. Hunan Provincial Natural Science Foundation of China [07jj107]
  4. 973 National Key Basic Research Program of China [2007CB310500]

Ask authors/readers for more resources

Electric-double-layer (EDL) effect is observed in microporous SiO2 dielectric films deposited at room temperature by plasma-enhanced chemical vapor deposition method. Indium tin oxide thin-film transistors gated by such microporous SiO2 gate dielectric are fabricated at room temperature, and a low operating voltage of 1.5 V is obtained due to the huge EDL specific capacitance (2.14 mu F/cm(2)). The field-effect electron mobility is estimated to be 118 cm(2) V-1 s(-1). Current on/off ratio and subthreshold gate voltage swing are estimated to be 5x10(6) and 92 mV/decade, respectively. Room-temperature deposited microporous SiO2 dielectric is promising for low-power field-effect transistors on temperature sensitive substrates.

Authors

I am an author on this paper
Click your name to claim this paper and add it to your profile.

Reviews

Primary Rating

4.6
Not enough ratings

Secondary Ratings

Novelty
-
Significance
-
Scientific rigor
-
Rate this paper

Recommended

No Data Available
No Data Available