Journal
IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume 39, Issue 12, Pages 2278-2291Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSSC.2004.836345
Keywords
all digital; Bluetooth; direct sampling; discrete time; frequency modulation; frequency synthesizers; phase domain; phase-locked loops; radio receivers; radio transmitters; sampled data circuits; single chip; system-on-chip (SoC); tranceivers
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We present a single-chip fully compliant Bluetooth radio fabricated in a digital 130-nm CMOS process. The transceiver is architectured from the ground up to be compatible with digital deep-submicron CMOS processes and be readily integrated with a digital baseband and application processor. The conventional RF frequency synthesizer architecture, based on the voltage-controlled oscillator and the phase/frequency detector and charge-pump combination, has been replaced with a digitally controlled oscillator and a time-to-digital converter, respectively. The transmitter architecture takes advantage of the wideband frequency modulation capability of the all-digital phase-locked loop with built-in automatic compensation to ensure modulation accuracy. The receiver employs a discrete-time architecture in which the RF signal is directly sampled and processed using analog and digital signal processing techniques. The complete chip also integrates power management functions and a digital baseband processor. Application of the presented ideas has resulted in significant area and power savings while producing structures that are amenable to migration to more advanced deep-submicron processes, as they become available. The entire IC occupies 10 mm(2) and consumes 28 mA during transmit and 41 mA during receive at 1.5-V supply.
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