Journal
IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume 40, Issue 2, Pages 444-453Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSSC.2004.841017
Keywords
CMOS image sensor; high range accuracy; high speed; light-section method; multisampling method; range finder; row parallel architecture; 3-D image sensor
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A high-speed three-dimensional (3-D) image sensor for a 1000 range maps/s 3-D measurement system based on a light-section method is presented. It employs a row-parallel search architecture to achieve a high-speed frame access rate for the detection of activated pixels on the focal plane. The row-parallel. search operation is carried out using chained search circuits embedded in a pixel. Moreover, we propose a row-parallel address acquisition technique using a bit-streamed column address flow. Row-parallel processors receive the bit-streamed column address and calculate the center position. of activated pixels. The pipelined operations enable a multisampling technique that improves the resolution of pixel detection. A 375 x 365 3-D image sensor using the present architecture has been designed in a one-poly five-metal 0.18-mum standard CMOS process and successfully tested. It attains a frame access rate of 394.5 kHz with four samplings, which corresponds to 1052 range maps/s. The multisampling operation improves the sub-pixel resolution to around 0.2 pixels and achieves a range accuracy of less than 1.10 mm at a target distance of 600 mm.
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