Journal
IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING
Volume 18, Issue 3, Pages 341-349Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TSM.2005.852091
Keywords
electrochemical processes; semiconductor device metallization; semiconductor films
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The planned introduction of porous, low-k dielectric materials into Si-based semiconductor devices will provide substantial challenges for chemical mechanical planarization. These challenges arise primarily from the mechanical fragility of such dielectrics, which may not withstand the force applied during chemical mechanical planarization. Planarization by Cu electropolishing has many advantages, including its noncontact nature, easy endpoint detection, and minimal introduction of contamination. However, pattern sensitivity may limit application of Cu electropolishing to augmenting, rather than completely replacing, chemical mechanical planarization. Electrochemical mechanical planarization appears to have less pattern dependence, but is still an evolving technology whose potential limitations are still unclear. Alternative electrochemical methods for Cu planarizition, including electropolishing and electrochemical mechanical planarization are herein reviewed and discussed.
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