Journal
IEEE ELECTRON DEVICE LETTERS
Volume 26, Issue 9, Pages 637-639Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2005.853670
Keywords
amorphous silicon nitride (a-SiN); microcrystalline; silicon (mu c-Si); plasma-enhanced chemical vapor deposition (PECVD); thin film transistors (TFTs)
Categories
Ask authors/readers for more resources
Top-gate thin-film transistors (TFTs) with microcrystalline silicon (mu c-Si) channel layers deposited using standard 13.56 MHz plasma-enhanced chemical vapor deposition were fabricated at a maximum processing temperature of 250 degrees C. The TFTs employ amorphous silicon nitride (alpha-SiN) as the gate dielectric layer. The 80-nm-thick mu c-Si channel layer showed a dark conductivity of the order of 10(-7) S/cm and a crystalline volume fraction of over 80%., The mu c-Si TFTs showed a field effect mobility of 0.85 cm(2)/V (.) s, a threshold voltage of 4.8 V, a subthreshold slope of 1 V/dec, and an ON/OFF current ratio of similar to 10(7). More importantly, the TFTs were very stable under gate bias stress, offering promise for organic light-emitting display (OLED) applications.
Authors
I am an author on this paper
Click your name to claim this paper and add it to your profile.
Reviews
Recommended
No Data Available