Journal
SOLID-STATE ELECTRONICS
Volume 49, Issue 11, Pages 1767-1775Publisher
PERGAMON-ELSEVIER SCIENCE LTD
DOI: 10.1016/j.sse.2005.10.024
Keywords
DRAM; capacitor; MIM; high-k; dielectric; electrode; atomic layer deposition; ALD
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The architecture, materials choice and process technology for stacked-capacitors in embedded-DRAM applications are a crucial concern for each new technology node. An overview of the evolution of capacitor technology is presented from the early days of planar PIS (poly/insulator/silicon) capacitors to the MIM (metal/insulator/metal) capacitors used for todays 65 nm technology node. In comparing Ta2O5, HfO2 and Al2O3 as high-k dielectric for use in 65 nm eDRAM technology, Al2O3 is found to give a good compromise between capacitor performance and manufacturability. The use of atomic layer deposition (ALD) is identified to be an enabling technology for both high-k dielectrics and capacitor electrodes. (c) 2005 Elsevier Ltd. All rights reserved.
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