Journal
IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 52, Issue 12, Pages 2654-2659Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2005.859691
Keywords
charge trap Flash (CTF) memory; electron back tunneling (ETB); erase; high-kappa dielectric; metal gate; NAND; work function
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We report the impact of high work-function (Phi(M)) metal gate and high-k, dielectrics on memory properties Of NAND-type charge trap Flash (CTF) memory devices. In this paper, theoretical and experimental studies show that high Phi(M) gate and high permittivity (high-k) dielectrics play a key role in eliminating electron back tunneling though the blocking dielectric during the erase operation. Techniques to improve erase efficiency of CTF memory devices with a fixed metal gate by employing various chemicals and structures are introduced and those mechanisms are discussed. Though process optimization of high Phi(M) gate and high-k materials, enhanced CTF device characteristics such as high speed, large memory window, and good reliability characteristics of the CTF devices are obtained.
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