Evidence of water-related discrete trap state formation in pentacene single-crystal field-effect transistors

We report on the generation of a discrete trap state during negative gate bias stress in pentacene single-crystal flip-crystal field-effect transistors with a SiO2 gate dielectric. Trap densities of up to 2 center dot 10(12) cm(-2) were created in the experiments. Trap formation and trap relaxation are distinctly different above and below similar to 280 K. In devices in which a self-assembled monolayer on top of the SiO2 provides a hydrophobic insulator surface we do not observe trap formation. These results indicate the microscopic cause of the trap state to be related to molecular layers of water adsorbed on the SiO2 surface.