4.6 Article

Vertical wrap-gated nanowire transistors

Journal

NANOTECHNOLOGY
Volume 17, Issue 11, Pages S227-S230

Publisher

IOP PUBLISHING LTD
DOI: 10.1088/0957-4484/17/11/S01

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We present a process for fabricating a field-effect transistor based on vertically standing InAs nanowires and demonstrate initial device characteristics. The wires are grown by chemical beam epitaxy at lithographically defined locations. Wrap gates are formed around the base of the wires through a number of deposition and etch steps. The fabrication is based on standard III - V processing and includes no random elements or single nanowire manipulation.

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