Journal
IEEE TRANSACTIONS ON COMPUTERS
Volume 55, Issue 10, Pages 1217-1229Publisher
IEEE COMPUTER SOC
DOI: 10.1109/TC.2006.164
Keywords
random number generation; special-purpose hardware; integrated circuits; sequential circuits; chaotic systems; ring oscillators; linear feedback shift registers
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A new method for digital true random number generation based on asynchronous logic circuits with feedback is introduced. In particular, a concrete technique using the so-called Galois and Fibonacci ring oscillators is developed and analyzed both theoretically and experimentally. The generated random binary sequences may have a very high speed and a higher and more robust entropy rate in comparison with previous proposals for digital random number generators. A new method for digital postprocessing of random data based on irregularly clocked nonautonomous synchronous logic circuits with feedback is also introduced and a concrete technique using a self-clock-control led linear feedback shift register is proposed. The postprocessing can provide both randomness extraction and computationally secure speed increase of input random data.
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