4.6 Article

SiO2/Si3N4/Al2O3 stacks for scaled-down memory devices:: Effects of interfaces and thermal annealing

Journal

APPLIED PHYSICS LETTERS
Volume 89, Issue 15, Pages -

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AMER INST PHYSICS
DOI: 10.1063/1.2360197

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Effects of interfaces and thermal annealing on the electrical performance of the SiO2/Si3N4/Al2O3 (ONA) stacks in nonvolatile memory devices were investigated. The results demonstrated the principal role of Si3N4/Al2O3 and Al2O3/metal-gate interfaces in controlling charge retention properties of memory cells. Memory devices that employ both electron and hole trappings were fabricated using a controlled oxidation of nitride surface prior to the Al2O3 growth, a high-temperature annealing of the ONA stack in the N-2+O-2 atmosphere, and a metal gate electrode having a high work function (Pt). These devices exhibited electrical performance superior to that of their existing SiO2/Si3N4/SiO2 analogs. (c) 2006 American Institute of Physics.

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