Effects of bias stress on ZnO nanowire field-effect transistors fabricated with organic gate nanodielectrics

The effects of bias stress (gate stress or drain stress) on nanowire field-effect transistor (NW-FET) stability were investigated as a function of stress bias and stress time. The n-channel NW-FETs used a nanoscopic self-assembled organic gate insulator, and each device contained a single ZnO nanowire. Before stress, the off current is limited by a leakage current in the 1 nA range, which increases as the gate to source bias becomes increasingly negative. The devices also exhibited significant changes in threshold voltage (V-th) and off current over 500 repeated measurement sweeps. The leakage current was significantly reduced after gate stress, but not after drain stress. V-th variations observed upon successive bias sweeps for devices following gate stress or drain stress were smaller than the V-th variation of unstressed devices. These observations suggest that gate stress and drain stress modify the ZnO nanowire-gate insulator interface, which can reduce electron trapping at the surface and therefore reduce the off current levels and variations in V-th. These results confirm that gate and drain stresses are effective means to stabilize device operation and provide high performance transistors with impressive reliabilities.