A 4.5-mW closed-loop ΔΣ micro-gravity CMOS SOI accelerometer

In this paper, design, implementation and characterization of a 3-V switched-capacitor (SC) Delta Sigma CMOS interface circuit for the closed-loop operation of a lateral capacitive microgravity silicon-on-insulator (SOI) accelerometer is presented. The interface circuit is based on a front-end programmable reference-capacitorless SC charge amplifier and a back-end second-order SC Delta Sigma modulator. The accelerometer is fabricated through a dry-release high aspect-ratio reduced-gap process. By incorporating the low-Q transfer function of the microaccelerometer in a feedback loop, the system's dynamic range is improved by 20 dB, leading to a measured resolution of 4 mu g/root Hz and an output dynamic range of 95 dB at 20 Hz. The bias instability is 2 to 8 mu g for 12 hours. The chip is fabricated in the 0.5-mu m standard CMOS process with an area of 2.25 mm(2). The integrated circuit (IC) consumes 4.5 mW of power.