Journal
IEEE JOURNAL OF SOLID-STATE CIRCUITS
Volume 42, Issue 4, Pages 766-774Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JSSC.2007.891655
Keywords
CMOS image sensor; column-parallel cyclic A/D converter; global electronic shutter; high-sensitivity; high-speed imaging; in-pixel charge amplifier
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This paper presents a high-speed, high-sensitivity 512x512 CMOS image sensor with column parallel cyclic 12-bit ADCs and a global electronic shutter. Each pixel has a charge amplifier for high charge-to-voltage conversion gain despite of using a large-size photodiode, and two sample-and-hold stages for the global shutter and fixed pattern noise (FPN) canceling. High-speed column-parallel cyclic ADC arrays with 12-bit resolution having a small layout size of 0.09 mm(2) are integrated at both sides of image array. A technique for accelerating the conversion speed using variable clocking and sampling capacitance is developed. A digital gain control function using 14-bit temporal digital code is also set in the column parallel ADC. The fabricated chip in 0.25-mu m CMOS image sensor technology achieves the full frame rate in excess of 3500 frames/s. The in-pixel charge amplifier achieves the optical sensitivity of 19.9 V/lx (.) s. The signal full scale at the pixel output is 1.8 V at 3.3-V supply and the noise level is measured to be 1.8 mV(rms), and the resulting signal dynamic range is 60 dB.
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