Journal
SOLID-STATE ELECTRONICS
Volume 51, Issue 6, Pages 882-887Publisher
PERGAMON-ELSEVIER SCIENCE LTD
DOI: 10.1016/j.sse.2007.04.015
Keywords
enhancement-mode; depletion-mode; DCFL; monolithic inverter; power-dissipation; noise margin
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The enhancement-mode (E-mode) and depletion-mode (D-mode) device operations on the same chip and their monolithic integration to form a DCFL inverter by using the double delta-doped AlGaAs/InGaAs pseudomorphic high-electron-mobility transistors have been successfully fabricated and investigated. Distinguished static and microwave-frequency characteristics of the E-mode and D-mode pHEMTs at high ambient temperatures and the temperature-dependent performances of the monolithic DCFL gate integration have been comprehensively studied. Experimentally, the studied device demonstrates superiorly stable thermal threshold coefficient (partial derivative V-th/partial derivative T) of 1 (-1.27) mV/mm-K for the D-mode (E-mode) device. The noise margins of the DCFL inverter, at V-DD = 1 V, are superiorly maintained above 0.1 V as the ambient temperature increases up to 400 K. The present devices are promisingly suitable for the low-power-dissipation, high-temperature digital circuit or the mixed-mode circuit applications. (c) 2007 Elsevier Ltd. All rights reserved.
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