Journal
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS
Volume 46, Issue 9A, Pages 5930-5934Publisher
JAPAN SOC APPLIED PHYSICS
DOI: 10.1143/JJAP.46.5930
Keywords
lll-V on insulator (III-V-OI); antiphase domains (APDs); microchannel epitaxy; lateral over growth; selective growth; two-step growth; GaAs; MBE
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We report a new microchannel epitaxy (NICE) technique for forming III-V semiconductor on insulator (III-V-OI) structures on a Si substrate with a thermally oxidized SiO2 mask for high performance n-type metal-insulator-semiconductor field-effect transistors (MISFETs). To reduce dislocations and antiphase domains (APDs), we propose a novel fabrication method of forming III-V-OI structures, where a two-step growth method is combined with NICE. The growth temperature of the low-temperature buffer layers and the growth rate in the two-step growth are optimized to meet the competing requirements for the reduction in APDs and selective growth. We demonstrate a fabrication of high-quality GaAs-OI structures using our proposed growth method under an optimized growth condition.
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