Journal
IEEE ELECTRON DEVICE LETTERS
Volume 28, Issue 10, Pages 909-912Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/LED.2007.904890
Keywords
carrier transport; gate all around; low temperature; MOSFET; silicon nanowire (SiNW)
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Gate-all-around n-MOSFETs with Si-nanowire (similar to 7 nm) as the channel body are fabricated and characterized for their low-temperature behavior (similar to 5 K to 295 K). I-DS-V-GS characteristics at low V-DS (similar to 50 mV) exhibit a decrease in current with decreasing temperature in strong inversion up to about similar to 200 K. However, at high V-DS, drain current reverts to typical temperature behavior, i.e., I-DS increases with the reducing temperature due to the increase in phonon-limited mobility (mu(ph)). It is inferred that, at low VDS, the enhancement in mu(ph) at a reduced temperature could be possibly masked by the intersubband scattering on account of subband splitting due to quantum-confinement effects as indicated by subband calculations for nanowire structures.
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