4.8 Article

Layer-by-Layer-Assembled Reduced Graphene Oxide/Gold Nanoparticle Hybrid Double-Floating-Gate Structure for Low-Voltage Flexible Flash Memory

Journal

ADVANCED MATERIALS
Volume 25, Issue 6, Pages 872-877

Publisher

WILEY-V C H VERLAG GMBH
DOI: 10.1002/adma.201203509

Keywords

reduced graphene oxide; gold nanoparticles; hybrid double floating gates; low voltage; flexible flash memory

Funding

  1. City University of Hong Kong [7002724]
  2. Research Grants Council of the Hong Kong Special Administrative Region [T23-713/11, AoE/P-03/08]

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A hybrid double-floating-gate flexible memory device by utilizing an rGO-sheet monolayer and a Au NP array as upper and lower floating gates is reported. The rGO buffer layer acts as a charge-trapping layer and introduces an energy barrier between the Au NP lower floating gate and the channel. The proposed memory device demonstrates a strong improvement in both field-effect-transistor (FET) and memory characteristics.

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