4.8 Article

Rich-Mixed-Valence NixCo3-xPy Porous Nanowires Interwelded Junction-Free 3D Network Architectures for Ultrahigh Areal Energy Density Supercapacitors

Journal

ADVANCED FUNCTIONAL MATERIALS
Volume 28, Issue 46, Pages -

Publisher

WILEY-V C H VERLAG GMBH
DOI: 10.1002/adfm.201804620

Keywords

3D network architectures; mixed valences; porous nanowires; supercapacitors; transition-metal phosphides

Funding

  1. National Natural Science Foundation of China [11374136, 51771090]
  2. Natural Science Foundation of Jiangsu Province [BK20161396]
  3. Fundamental Research Funds for the Central Universities [021314380073]
  4. Open fund by Jiangsu Key Laboratory of Atmospheric Environment Monitoring and Pollution Control [KHK1711]

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Herein, novel phosphide composites (NixCo3-xPy) are reported with well-defined hexagonal thin-plate morphology and a hieratically porous but robust junction-free 3D network constructed by interwelding porous NWs, which are achieved by first synthesizing 2D Ni-Co precursors with tunable Ni/Co molar ratios and top-down etching, followed by phosphorization. Owing to enhanced electron/ion transfer, increased availability of active sites/interfaces, rich mixed valences of bimetals and P, and strong intercomponent synergy, the optimized NiCoP-CoP shows a specific capacitance reaching 1969 F g(-1), much larger than those of Ni-Co sulfides and other similar phosphides. An asymmetric supercapacitor employing the advanced NiCoP-CoP as positive electrode exhibits a remarkable cycling stability with 93% retention after 5000 cycles at 8 A g(-1), which is mainly attributed to such architecture allowing strong mechanical stability and to effectively buffer the strain/volume expansion during fast Faradaic reactions. A single device having both an output voltage as high as 7.2 V and an ultrahigh areal energy density of 639 mWh cm(-2) at 48 W cm(-2) is realized by a designed configuration in which four capacitors in series connection are stacked with solid-state electrolyte. An almost linear increase in output voltage with the layer number indicates possibility to meet various output requirements for miniaturized electronics.

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