GaAs Nanowires: From Manipulation of Defect Formation to Controllable Electronic Transport Properties

Reliable control in the crystal quality of synthesized III-V nanowires (NWs) is particularly important to manipulate their corresponding electronic transport properties for technological applications. In this report, a two-step growth process is adopted to achieve single-crystalline GaAs NWs, where an initial high-temperature nucleation process is employed to ensure the formation of high Ga supersaturated Au7Ga3 and Au2Ga alloy seeds, Instead of the low Ga supersaturated Au7Ga2 seeds observed In the conventional single-step growth. These two-step NWs are long (>60 mu m) and thick (>80 nm) with the minimal defect concentrations and uniform growth orientations. Importantly, these NWs exhibit p-type conductivity as compared to the single-step grown n-type NWs for the same diameter range. This NW conductivity difference (p- versus n-channel) Is shown to originate from the donor-like crystal defects, such as As precipitates, induced by the low Ga supersaturated multicrystalline Au7Ga2 alloy seeds. Then the well-controlled crystal quality for desired electronic properties is further explored in the application of large-scale p-type GaAs NW parallel array FETs as well as the integration of both p- and n-type GaAs NWs into CMOS inverters. All these illustrate the successful control of NW crystal defects and corresponding electronic transport properties via the manipulation of Ga supersaturation in the catalytic alloy tips with different preparation methods. The understanding of this relationship between NW crystal quality and electronic transport properties is critical and preferential to the future development of nanoelectronic materials, circuit design, and fabrication.