Journal
ACS APPLIED MATERIALS & INTERFACES
Volume 6, Issue 19, Pages 16782-16791Publisher
AMER CHEMICAL SOC
DOI: 10.1021/am504046b
Keywords
wet etching; electrical bias; 3D microstructures
Funding
- Nation Science Foundation (CMMI) [1130876]
- Div Of Civil, Mechanical, & Manufact Inn
- Directorate For Engineering [1130876] Funding Source: National Science Foundation
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In this work, a novel wet silicon (Si) etching method, electric bias-attenuated metal-assisted chemical etching (EMaCE), is demonstrated to be readily available for three-dimensional (3D) electronic integration, microelectromechinal systems, and a broad range of 3D electronic components with low cost. On the basis of the traditional metal-assisted chemical etching process, an electric bias was applied to the Si substrate in EMaCE. The 3D geometry of the etching profile was effectively controlled by the bias in a real-time manner. The reported method successfully fabricated an array of over 10 000 vertical holes with diameters of 28 mu m on 1 cm(2) silicon chips at a rate of up to 11 mu m/min. The sidewall roughness was kept below 50 nm, and a high aspect ratio of over 10:1 was achieved. The 3D geometry could be attenuated by the variable applied bias in real time. Vertical deep etching was realized on (100)-, (111)-Si, and polycrystalline Si substrates. Complex features with lateral dimensions of 0.8-500 mu m were also fabricated with submicron accuracy.
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