4.4 Article

Generalised switching scheme for a space vector pulse-width modulation-based N-level inverter with reduced switching frequency and harmonics

Journal

IET POWER ELECTRONICS
Volume 8, Issue 12, Pages 2377-2385

Publisher

INST ENGINEERING TECHNOLOGY-IET
DOI: 10.1049/iet-pel.2015.0101

Keywords

PWM invertors; space vector pulse-width modulation-based N-level inverter; reduced switching frequency; SVPWM-based multilevel inverter; generalised online switching scheme; voltage level; seven-segment switching scheme; generalised three-switching scheme; harmonics reduction; five-level cascaded inverter

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This study presents a generalised online switching scheme for a space vector pulse-width modulation (SVPWM)-based multilevel inverter of any voltage level. The proposed SVPWM algorithm implements a generalised three-(similar to five) and seven-segment switching scheme using the three most desired switching states and one suitable redundant state for each triangle. In addition, a novel three-segment and seven-segment switching scheme has been proposed, which eliminates extra switching commutations and hence minimises the switching frequency of the devices while reducing harmonics. The proposed modulation algorithm using the generalised expressions is implemented online. The performance of the proposed novel algorithm for N-level inverter is tested experimentally on a five-level cascaded inverter at various fundamental frequencies and the experimental results are verified with the simulation results.

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