Journal
IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY
Volume 6, Issue 1, Pages 341-345Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/JEDS.2018.2805285
Keywords
Forming voltage; temperature; rising time; charge accumulation; 1T1R; RRAM
Categories
Funding
- National Science Council Core Facilities Laboratory for Nano-Science and Nano-Technology in Kaohsiung-Pingtung Area
- Ministry of Science and Technology, Taiwan [MOST-106-2119-M-110-003, MOST-106-2112-M-110-008-MY3]
- National Key Research and Development Program of China [2017YFB0405602]
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In this paper, we discover an operation method that can effectively decrease the forming voltage in resistance random access memory (RRAM). Forming voltage can be reduced by either increasing the rising time of the forming-waveform or by increasing the temperature in the forming process. However, the resulting electronic RRAM characteristics after each of these methods differ. While increasing the rising time causes greater damage to the switching layer due to longer accumulation of charge, increasing temperature in the forming process does not. The high temperature-formed RRAM excels in retention and endurance tests, proving an effective means to decrease forming voltage.
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