Journal
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
Volume 23, Issue 8, Pages 1547-1551Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TVLSI.2014.2340576
Keywords
Low-power design; low-voltage design; subthreshold circuits; voltage reference
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We propose a subthreshold CMOS voltage reference operating with a minimum supply voltage of only 150 mV, which is three times lower than the minimum value presently reported in the literature. The generated reference voltage is only 17.69 mV. This result has been achieved by introducing a temperature compensation technique that does not require the drain-source voltage of each MOSFET to be larger than 4kT/q. The implemented solution consists in two transistors voltage reference with two MOSFETs of the same threshold-type and exploits the dependence of the threshold voltage on transistor size. Measurements performed over a large sample population of 60 chips from two separate batches show a standard deviation of only 0.29 mV. The mean variation of the reference voltage for V-DD ranging from 0.15 to 1.8 V is 359.5 mu V/V, whereas the mean variation of V-REF in the temperature range from 0 degrees C to 120 degrees C is 26.74 mu V/degrees C. The mean power consumption at 25 degrees C for V-DD = 0.15 V is 26.1 pW. The occupied area is 1200 mu m(2).
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