4.6 Article

A μ-Controller-Based System for Interfacing Selectorless RRAM Crossbar Arrays

Journal

IEEE TRANSACTIONS ON ELECTRON DEVICES
Volume 62, Issue 7, Pages 2190-2196

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TED.2015.2433676

Keywords

Crossbars; memristors; resistive random-access memory (RRAM); sneak paths

Funding

  1. CHIST-ERA ERA-Net
  2. Engineering and Physical Sciences Research Council [EP/J00801X/1, EP/K017829/1]
  3. FP7 RAMP Program
  4. Engineering and Physical Sciences Research Council [1402607, EP/J00801X/1, EP/K017829/1] Funding Source: researchfish
  5. EPSRC [EP/J00801X/1, EP/K017829/1] Funding Source: UKRI

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Selectorless crossbar arrays of resistive random-access memory (RRAM), also known as memristors, conduct large sneak currents during operation, which can significantly corrupt the accuracy of cross-point analog resistance (M-t) measurements. In order to mitigate this issue, we have designed, built, and tested a memristor characterization and testing (mCAT) instrument that forces redistribution of sneak currents within the crossbar array, dramatically increasing Mt measurement accuracy. We calibrated the mCAT using a custom-made 32 x 32 discrete resistive crossbar array, and subsequently demonstrated its functionality on solid-state TiO2-x RRAM arrays, on wafer and packaged, of the same size. Our platform can measure standalone Mt in the range of 1 k Omega to 1 M Omega with <1% error. For our custom resistive crossbar, 90% of devices of the same resistance range were measured with <10% error. The platform's limitations have been quantified using large-scale nonideal crossbar simulations.

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