Journal
IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY
Volume 15, Issue 2, Pages 198-205Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TDMR.2015.2414303
Keywords
Degradation; CdTe; thin film; defect generation
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For the first time, the degradation rate of the electrical parameters in thin-film solar cells based on CdS/CdTe materials is simulated numerically using the Analysis of Microelectronics and Photonic Structures (AMPS-1D) program. This time-dependent approach attributes the defect generation rate to the excess carrier concentration profile. The degradation rate is analyzed for the devices stressed under the open-circuit, short-circuit, illumination, and dark conditions. Illuminated open-circuited devices showed a faster degradation rate than the short-circuited and dark-rested ones. This instability was mostly driven by the loss in the fill factor relevant to the increased series resistance. A separate analysis of the degradation behavior arisen from the holes and electrons indicates that the holes degrade the device slightly stronger than the electrons. In the CdTe thin films, the drift mobility of the holes is an order of magnitude lower than that of the electrons, which allows a longer interaction of the holes with the semiconductor lattice. Starting from the simplest device structure, e.g., Gloeckler model, the calculations are extended to the defect increment at the very thin layers placed at the front and back regions of the device. Both layers caused an almost similar degradation trend but a slightly faster rate when the thin defective layer was placed at the junction. This time-dependent approach can be extended to simulate the degradation behavior of the electrical parameters in other thin-film devices, such as CIGS and CZTS materials, under the different stress conditions leading to the different defect distribution across the device thickness.
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