Journal
IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY
Volume 15, Issue 3, Pages 417-422Publisher
IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TDMR.2015.2455506
Keywords
Poly-Si thin-film transistor; nonvolatile memory; grain boundary; retention time; fatigue cycle
Funding
- Seoul National University (SNU), Seoul, Korea, through the Eui-San Research Center
- Research Institute of Advanced Materials (RIAM)
- BK21PLUS SNU Materials Division for Educating Creative Global Leaders [F15SN02D1702]
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Quasi-single-grained Pb(Zr,Ti)O-3 (PZT) was successfully grown for the gate dielectric of a poly-Si thin-film transistor (TFT) in a metal-ferroelectric-insulator-semiconductor memory structure. The quasi-single-grained PZT was obtained by controlling the artificial nucleation formed by Pt dot arrays and was enlarged by the nucleated PZT seeds until it covers the poly-Si channel. The single-grained diameter size was 40 mu m with a (100) dominated texture. The poly-Si memory device with the single-grained PZT showed excellent ferroelectric, electrical, and reliability properties compared with the poly-Si memory device with poly-grained PZT. Moreover, eliminating the grain boundary in a PZT film showed the fatigue and retention characteristics with only 1.1% after 10(13) cycles and 22% after 1 month.
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