4.7 Article

FPAA/Memristor Hybrid Computing Infrastructure

Journal

Publisher

IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
DOI: 10.1109/TCSI.2014.2386773

Keywords

Analog signal processing; field-programmable analog array (FPAA); hybrid integrated circuit; memristor

Funding

  1. Academy of Finland [140108, 258831, 253596, 264914, 277383]
  2. Air Force Office of Scientific Research (AFOSR) through MURI grant [FA9550-12-1-0038]
  3. Academy of Finland (AKA) [264914, 253596, 253596, 140108, 140108, 264914] Funding Source: Academy of Finland (AKA)

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This paper presents a circuit in which tungsten oxide-based analog memristors are post-processed on a CMOS-based Field-Programmable Analog Array Integrated Circuit (FPAA-IC). FPAAs are powerful tools for rapid analog experimentation, prototyping and power-efficient computing, and they allow custom analog circuits to be built and reconfigured. The primary motivation for this work is to introduce and demonstrate the operation of the FPAA/memristor hybrid circuit and the board-level infrastructure, and to form a basis for subsequent empirical work on analog memristive computing. The experiments shown in this paper demonstrate a successful fabrication of memristors on the FPAA substrate, and the usefulness of the hybrid computing infrastructure in terms of experimentation with memristors. The experiments suggest that a single state variable cannot capture the adaptation of a memristor. To this end, a SPICE compatible memristor model with two state variables is presented. Furthermore, a memristor-based adaptive coincidence detector is demonstrated on the FPAA/Memristor computing infrastructure.

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