3.8 Proceedings Paper

Development and Integration of a High Efficiency Baseline Leading to 23% IBC Cells

Publisher

ELSEVIER SCIENCE BV
DOI: 10.1016/j.egypro.2012.07.122

Keywords

Silicon; IBC; High-efficiency; Processing

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This paper presents the development of single step processes and their integration into a baseline for the lab scale manufacturing of high efficiency IBC cells. The main processes evaluated include cleaning, oxidation, boron and phosphorous doping. Three different cleaning treatments, combined with the optimization of thermal oxidation, have been studied. Lifetime values up to 8 ms at an injection level of 1.10(15) cm(-3) have been achieved on 280 mu m, n-Si FZ wafers with a base resistivity of 1.9 Omega.cm. Boron diffusion is evaluated starting from a boron-doped SiOx CVD layer and compared to the diffusion from a BBr3 source. Both doping processes enable J(0) values as low as 10 fA/cm(2) with a thermal silicon oxide passivation. We present the evolution of the integration runs as a result from the introduction of the improved steps. With the latest improvements, IV characteristics progressed from efficiencies similar to 20% up to 23.3% (calibrated IV values: 696 mV, 41.6 mA/cm(2), FF=80.4% with an efficiency of 23.3%). (C) 2012 Published by Elsevier Ltd. Selection and peer-review under responsibility of the scientific committee of the SiliconPV 2012 conference.

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