Journal
GRAPHENE, GE/III-V, NANOWIRES, AND EMERGING MATERIALS FOR POST-CMOS APPLICATIONS 4
Volume 45, Issue 4, Pages 3-14Publisher
ELECTROCHEMICAL SOC INC
DOI: 10.1149/1.3700447
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Funding
- Nanoelectronics Research Initiative's ( NRI's) Southwest Academy of Nanoelectronics (SWAN)
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The Bilayer pseudo-spin Field Effect Transistor (BiSET) has been proposed as one means of taking advantage of possible room temperature superfluidity in two graphene layers separated by a thin dielectric. In principle, the switching energy per device could be on the scale of 10 zJ, over two orders of magnitude below estimates for end-of the roadmap CMOS transistors. However, achieving both the goal of room temperature superfluidity and harnessing it for low-power switching pose substantial challenges, both theoretical and experimental. In this work we review the basic graphene superfluidity and BiSFET concepts, our current understanding-and limits to that understanding-of the requirements for condensate formation, and how these requirements could impact BiSFET design.
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