Journal
MICROELECTRONICS RELIABILITY
Volume 85, Issue -, Pages 49-65Publisher
PERGAMON-ELSEVIER SCIENCE LTD
DOI: 10.1016/j.microrel.2018.04.002
Keywords
Bias temperature instabilities; High-k dielectric materials; Semiconductor device reliability
Funding
- FFG [861022]
- Austrian Science Fund (FWF) [i2606-N30]
- GTS (Global TCAD Solutions)
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Metal-oxide-semiconductor (MOS) devices are affected by generation, transformation, and charging of oxide and interface defects. Despite 50 years of research, the defect structures and the generation mechanisms are not fully understood. Most light has been shed onto the charging mechanisms of pre-existing oxide defects by using the non-radiative multi-phonon theory. In this work we present how the gist of physical models for pre-existing oxide defects can be efficiently abstracted at a minimal loss of physical foundation and accuracy. Together with a semi-empirical model for the generation and transformation of defects we establish a reaction-limited framework for unified simulation of bias temperature instabilities (BTI). The applications of the framework we present here cover simulation of BTI for negative (NBTI) and positive (PBTI) gate voltages, life time extrapolation, AC stress with arbitrary signals and duty cycles, and gate stack engineering.
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