Space Vector based Pulse Width Modulation Scheme for Multilevel Inverters Using the Concept of Multi-Valued Logic

An N-level inverter has 'N' discrete levels in the pole voltage, and hence multilevel inverter can be viewed as a multi-valued logic device. A space vector pulse width modulation (SVPWM) scheme for multilevel inverter is presented based on the principle of multi-valued logic. The multi-valued logic operations are utilized to realize a computationally efficient space vector PWM scheme. The algorithm used to realize the reference space vector are generated using multi-valued logic. The scheme is experimentally verified using a 3-level inverter in cascade configuration and experimental results are presented to validate the scheme.